At8xc51snd1c – Rainbow Electronics AT89C51SND1C User Manual

Page 155

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155

AT8xC51SND1C

4109E–8051–06/03

Slave Mode with Interrupt
Policy

Figure 120 shows the initialization phase and the transfer phase flows using the
interrupt.

The transfer format depends on the master controller.

Reading SPSTA at the beginning of the ISR is mandatory for clearing the SPIF flag.
Clear is effective when reading SPDAT.

Figure 122. Slave SPI Interrupt Policy Flows

SPI Initialization

Interrupt Policy

Enable interrupt

ESPI =1

SPI Interrupt

Service Routine

Select Slave Mode

MSTR = 0

Select Format

program CPOL & CPHA

Enable SPI

SPEN = 1

Get Status

Read SPSTA

Prepare New Transfer

write data in SPDAT

Get Data Received

read SPDAT

Prepare Transfer

write data in SPDAT

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