Table 81), Ee table 82), At8xc51snd1c – Rainbow Electronics AT89C51SND1C User Manual
Page 72
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72
AT8xC51SND1C
4109E–8051–06/03
Table 81. MP3TRE Register
MP3TRE (S:B6h) – MP3 Treble Control Register
Reset Value = 0000 0000b
Table 82. MP3CLK Register
MP3CLK (S:EBh) – MP3 Clock Divider Register
Reset Value = 0000 0000b
7
6
5
4
3
2
1
0
-
-
TRE5
TRE4
TRE3
TRE2
TRE1
TRE0
Bit
Number
Bit
Mnemonic
Description
7 - 6
-
Reserved
The value read from these bits is always 0. Do not set these bits.
5-0
TRE5:0
Treble Gain Value
Refer to Table 70 for the treble control description.
7
6
5
4
3
2
1
0
-
-
-
MPCD4
MPCD3
MPCD2
MPCD1
MPCD0
Bit
Number
Bit
Mnemonic
Description
7 - 5
-
Reserved
The value read from these bits is always 0. Do not set these bits.
4-0
MPCD4:0
MP3 Decoder Clock Divider
5-bit divider for MP3 decoder clock generation.
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