At8xc51snd1c – Rainbow Electronics AT89C51SND1C User Manual
Page 199
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199
AT8xC51SND1C
4109E–8051–06/03
Waveforms
Figure 155. FLASH Memory - ISP Waveforms
Note:
1. ISP must be driven through a pull-down resistor (see Section “In System Program-
Figure 156. FLASH Memory - Internal Busy Waveforms
External Clock Drive and Logic Level References
Definition of symbols
Table 176. External Clock Timing Symbol Definitions
Timings
Table 177. External Clock AC Timings
V
DD
= 2.7 to 3.3 V, T
A
= -40 to +85
°
C
Waveforms
Figure 157. External Clock Waveform
RST
T
SVRL
ISP
(1)
T
RLSX
FBUSY bit
T
BHBL
Signals
Conditions
C
Clock
H
High
L
Low
X
No Longer Valid
Symbol
Parameter
Min
Max
Unit
T
CLCL
Clock Period
50
ns
T
CHCX
High Time
10
ns
T
CLCX
Low Time
10
ns
T
CLCH
Rise Time
3
ns
T
CHCL
Fall Time
3
ns
T
CR
Cyclic Ratio in X2 mode
40
60
%
0.45 V
T
CLCL
V
DD
- 0.5
V
IH1
V
IL
T
CHCX
T
CLCH
T
CHCL
T
CLCX
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