Document Outline

• Features
• Description
• AT75C220 Pin Configuration
• Pin Description
• Architectural Overview
• Peripheral Data Controller
• Memory Map
• Peripheral Memory Map
• Initialization
  • Reset Pin
  • Processor Synchronization
• Clocking
  • Oscillator and PLL
  • ARM System Clock
  • Oak System Clock
  • Other Clocks
• Boot Mode
• AT75C220 Mode Controller
  • Register Map
• External Bus Interface
  • SMC: Static Memory Controller
    • External Memory Mapping
    • Data Bus Width
    • Byte-write or Byte-select Mode
    • Read Protocols
    • Write Protocol
    • Wait States
    • LCD Interface Mode
  • SMC Register Map
  • Switching Waveforms
  • SDMC: SDRAM Controller
    • APB Interface
    • ASB Interface
    • Read and Write Bursts
  • SDRAM Refresh
• Arbitration Using Multi-layer AMBA
  • Coupled Bus Operation
  • ASB-ASB Bridge Timing
  • Deadlock
• Ethernet MAC
  • DMA Operation
  • Transmitter Mode
  • Receiver Mode
  • Address Checking
  • Register Map
  • MAC Statistics Register Block
• AIC: Advanced Interrupt Controller
  • Priority Controller
  • Interrupt Handling
  • Interrupt Masking
  • Interrupt Clearing and Setting
  • Standard Interrupt Sequence
  • Fast Interrupt
    • Fast Interrupt Sequence
  • Software Interrupt
  • Spurious Interrupt
    • Spurious Interrupt Sequence
  • AIC User Interface
• PIO: Programmable I/O Controller
  • Output Selection
  • I/O Levels
  • Interrupts
  • User Interface
  • PIO User Interface
• USART: Universal Synchronous/Asynchronous Receiver/Transmitter
  • Pin Description
  • Baud Rate Generator
  • Receiver
    • Asynchronous Receiver
    • Synchronous Receiver
    • Receiver Ready
    • Parity Error
    • Framing Error
    • Time-out
  • Transmitter
    • Time-guard
  • Multi-drop Mode
  • Break
    • Transmit Break
    • Receive Break
  • Interrupt Generation
  • Channel Modes
  • Peripheral Data Controller
  • Modem Control and Status Signals
    • NCTS: Clear to Send
    • NDCD: Data Carrier Detect
    • NDSR: Data Set Ready
    • NDTR: Data Terminal Ready
    • NRI: Ring Indicator
    • NRTS: Request to Send
• TC: Timer/Counter
  • Signal Name Description
  • Timer/Counter Description
    • Counter
    • Clock Selection
    • Clock Control
  • Timer/Counter Operating Modes
    • Trigger
  • Capture Operating Mode
    • Capture Registers A and B (RA and RB)
    • Trigger Conditions
    • Status Register
  • Waveform Operating Mode
    • Compare Register A, B and C (RA, RB, and RC)
    • Output Controller
    • Status
  • TC User Interface
• SPI: Serial Peripheral Interface
  • Master Mode
    • Fixed Peripheral Select
    • Variable Peripheral Select
    • Chip Selects
    • Mode Fault Detection
  • Slave Mode
  • Data Transfer
  • Clock Generation
  • Peripheral Data Controller
  • SPI Programmer’s Model
• WD: Watchdog Timer
  • WD User Interface
  • WD Enabling Sequence