Teledyne LeCroy Summit T3-8 PCIe Multi-lane Protocol Analyzer User Manual - Manual (Page 241)

Summit T3‐8 PCI Express Multi‐Lane Protocol Analyzer User Manual 229
PCIe SSD Base Address Mapping Teledyne LeCroy Corporation
All the fields in this dialog are required and editable. Make sure that the information
entered is correct. Click on any field and the description displays in the bottom read‐only
box (see Figure xx on page xx). Some important fields are described below:
 Device: There is only one device node, (support for multiple device trace decod‐
ing will be available in a later release). If there is no device node, then
the user can add a device node by clicking the Add Device button.
 MBAR: The 64‐bit main address bar (i.e. BAR1:BAR0). Without this value
decoding cannot be done. It should be in "0x" hex format.
 Queues: Under this node the user can add more missing nodes to decode the
current trace. Click the Add Queue or Delete Queue button to add or delete a queue
node. Type based on the user selection. The following Node types are known.
Figure 10.38: Node Types
The address is 64‐bit and should be in "0x" hex format. Please use the right value for each
size as it is an important attribute. Consult the NVMe specifications for the correct value.
Clicking the Re‐Decode button erases the current configuration from this dialog box and
attempts to re‐decode based on the information present in the open trace and/or saved
on the disk with the last decode.
Click button to decode the trace and select Tools > PCIe SSD Base Address Mapping.
The two figures below show the BAR information for PQI and AHCI. If this information is
present in the trace then it is not editable, otherwise it can be edited. Decoding is done
only when configuration space and administration information is available.