Hardware management, 1 hardware management overview, 2 hardware management functionality – Kontron AT8242 User Manual

Page 42: 1 hardware management architecture, Hardware management architecture

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AT8242

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4. Hardware Management

4.1

Hardware Management Overview

The purpose of the hardware management system is to monitor, control, ensure proper operation and
provide hot swap support of ATCA Boards. The hardware management system watches over the basic health of
the system, reports anomalies, and takes corrective action when needed. The hardware management system
can retrieve inventory information and sensor readings as well as receive event reports and failure
notifications from boards and other Intelligent FRUs. The hardware management system can also perform
basic recovery operations such as power cycle or reset of managed entities.

4.2

Hardware Management Functionality

The Front Blade Unit supports an “intelligent” hardware management system, based on the Intelligent
Platform Management Interface Specification. The hardware management system of the Front Blade Unit
provides the ability to manage the power and interconnect needs of intelligent devices, to monitor events,
and to log events to a central repository.

4.2.1

Hardware Management Architecture

The AT8242 is made of three distinct entities: The switch management processor unit (along with the
ethernet switch itself) and two network processor units. Each entity is independent and has its own power
and reset domain. The logical hardware management architecture of the AT8242 is such that the blade acts as
a pseudo-carrier, where each NPU engine is considered as a virtual AMC. Even though the NPU engines are
not hot-swappable, they use the same API that would normally be associated to a distinct FRU, and they are
both managed by their own virtual MMC.

The purpose of each virtual MMC instance is to have control over its associated engine payload power and
reset domain, to monitor proper operation and maintain sensors relevant to the managed entity. The switch
management processor unit is managed by the IPMC, which performs the same tasks over its entity. The IPMC
is also responsible for proper interoperability with the shelf the AT8242 is installed in (i.e. Power negotiation
and e-keying).

Each unit can perform transactions with its respective management controller using the KCS system
interface. Communication between the IPMC and both virtual MMC instance is achieved using a virtual IPMB-
L implementation, which allows transparently performing bridged transactions to the managed FRUs as if it
was an actual IPMB. Only the IPMC can be accessed over IOL, using the Base Interface.

The following table lists each unit with its IPMB-L address.

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