Spectrum Controls 1746sc-INI4vi - Manual (Page 10)

6 SLC 500 ™ Isolated Analog Input Modules
Full-scale range (FSR) – The difference between the maximum and
minimum specified analog values.
Gain drift – The change in full-scale transition voltage measured over
the operating temperature range of the module.
LSB (least significant bit) – The bit that represents the smallest value
within a string of bits. The “weight” of this value is defined as the full-
scale range divided by the resolution.
Maximum differential voltage – The largest voltage difference allowed
between the negative terminal and positive terminal during normal
differential operation.
Module ID code – A unique number associated with each 1746 I/O
module. The code defines for the processor the type of I/O or specialty
module residing in a specific slot in the 1746 chassis.
Module update time – See channel update time.
Normal mode rejection (differential mode rejection) – A logarithmic
measure, in dB, of a device’s ability to reject noise signals between or
among circuit signal conductors, but not between the equipment
grounding conductor or signal reference structure and the signal
conductors.
Overall accuracy – The worst-case deviation of the signal over the full
range, expressed in percent of full scale.
Rack – A hardware assembly that houses devices such as I/O modules,
adapter modules, processor modules, and power supplies.
Repeatability – The closeness of agreement among repeated
measurements of the same variable under the same conditions.
Resolution – The smallest detectable change in a measurement, typically
expressed in engineering units (e.g. 0.15
°
C) or as a number of bits. For
example, a 12-bit system has 4096 possible output states. It can therefore
measure 1 part in 4096. See also effective resolution.
Sampling time – The time required by the A/D converter to sample an
input channel.
Status word – Contains status information about the channel’s current
configuration and operational state. You can use this information in your
ladder program to determine whether the channel data word is valid.
Step response time – The time required for the A/D signal to reach 95%
of its expected, final value, given a full-scale step change in the input
signal.
Useful resolution – See effective resolution.