Altera Nios II C2H Compiler - Manual (Page 28)

2–6 9.1 Altera Corporation
Nios II C2H Compiler User Guide November 2009
Tutorial
2. Set up the hardware project directory
a. Using a file management tool on the host computer, locate the
standard
hardware example design for your Nios development
board. For example, on a Windows PC, use Windows Explorer
to find the Verilog HDL design files for the Nios development
board, Cyclone
® II Edition at <Nios II EDS install path>/
examples/verilog/ niosII_cycloneII_2c35/standard .
b. Copy the standard directory and name the copied directory
c2h_tutorial_hw
. This new directory serves as the hardware
design for the tutorial.
3. Start the Quartus II software.
4. Open the Quartus II project standard.qpf located in the
c2h_tutorial_hw
directory.
The Quartus II software might give a warning "Do you want to
overwrite the database ... created by Quartus II Version <version>...
The database format is compatible..." if the project was created with
an earlier version of the software. If so, click Yes to update the
database.
5. Configure the FPGA on the Nios development board.
a. On the Tools menu click Programmer. The Programmer
appears, with the SRAM object file standard.sof automatically
ready to download to the FPGA.
b. Turn on the Program/Configure check box for standard.sof.
c. Click Start. The programmer downloads the configuration data
to the FPGA.
1
If Start is not enabled, click Hardware Setup to configure
your JTAG download cable.
Create the Software Project
To set up the software project for the tutorial, perform the following steps.
1. Start the Nios II IDE.
2. If the Workspace Launcher dialog box appears, click OK to accept
the default workspace.