What to expect from the c2h compiler, What to expect from the c2h compiler –5 – Altera Nios II C2H Compiler User Manual

Page 11

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Altera Corporation

9.1

1–5

November 2009

Nios II C2H Compiler User Guide

Introduction to the C2H Compiler

The Nios II C-to-Hardware Acceleration (C2H) Compiler represents
Altera's next step in the evolution of embedded systems design. The
C2H Compiler uses the infrastructure provided by SOPC Builder and the
Nios II processor, and adds a higher level of abstraction: converting C
functions directly to hardware.

What to Expect From the C2H Compiler

The C2H Compiler is not designed to build all types of FPGA systems. It
is designed specifically to augment the performance of programs that run
on the Nios II processor; it does not replace the processor. Two notable
implications are:

The C2H Compiler assumes that your C code runs successfully on a
Nios II processor system.

The result of using the C2H Compiler is a program that runs on a
Nios II processor system.

The C2H Compiler works best on C code that adheres to certain
structural rules. It works well for many types of programs, but not all.
Through education and habit, programmers structure C programs with
an existing compiler in mind. Experienced designers learn the particular
structures that produce optimal compiled results. The C2H Compiler is
also a C compiler. It takes ANSI C programs that execute normally on a
processor. However, the program structure for producing optimal
hardware results with the C2H Compiler often differs from code
structured for execution on a processor. You achieve the best results if you
have a reasonable understanding of how the C2H Compiler translates C
structures to hardware. Refer to chapter

Chapter 3, C-to-Hardware

Mapping Reference

for details.

The C2H Compiler is not a replacement for traditional HDL-based
hardware design. Tasks such as connecting modules together and
interfacing to bus protocols are not easily inferred from ANSI C code. In
the hands of an experienced user, the C2H Compiler allows considerable
control over circuit latency and parallelism. However, it does not provide
the ability to define user logic with complex timing requirements. For
example, the C2H Compiler does not allow you to create an arbitrary
state machine that guarantees a particular operation on a specific clock
cycle.

1

The Nios II processor is little-endian. For Nios II compatibility,
C2H accelerators expect to exchange little-endian data with the
processor. If your accelerator must handle big-endian data, you
can swap the byte order in the accelerated C code. Ensure that
the data is in little-endian form when your accelerated function
transfers it to any unaccelerated function.

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