Pipelined operations and assignments – Altera Nios II C2H Compiler User Manual

Page 44

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3–4

9.1

Altera Corporation

Nios II C2H Compiler User Guide

November 2009

One-to-One C-to-Hardware Mapping

Pipelined Operations and Assignments

The C2H Compiler always registers the results of the operators listed in

Table 3–3

. Some arithmetic operations, such as multiplication, use a large

amount of logic, which creates a significant propagation delay through
the circuit. Calculating these operations in series with other operations in
a single clock cycle would incur unacceptable propagation delays and
significantly reduce the maximum achievable clock frequency (f

MAX

) for

the system. The C2H Compiler pipelines these operations by giving each
its own registered assignment. There are exceptions for cases in which an
operation reduces to trivial logic, as listed in

Table 3–3

The general rule "one registered assignment for every = operator" can be
amended to read, "one registered assignment for every = operator or
complex arithmetic operator".

Table 3–3. Complex Arithmetic Operations Pipelined by the C2H Compiler

Operator

Description

Exceptions

*

Multiplication

Either operand is a constant power of
2, which reduces to left-shift operation

/

Division

Right-hand operand is a constant
power of 2, which reduces to a right-
shift operation

%

Modulus

Right-hand operand is a constant
power of 2, which reduces to a
masking operation

>>

Right bit-wise shift

Right-hand side is constant

<<

Left bit-wise shift

Right-hand side is constant

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