Altera RAM-Based Shift Register - Manual (Page 4)

1–2 Chapter 1: About this Megafunction
Features
RAM-Based Shift Register (ALTSHIFT_TAPS) Megafunction User Guide May 2013 Altera Corporation
Altera provides a RAM-based shift register megafunction called ALTSHIFT_TAPS
that contains additional features not found in a conventional shift register. Traditional
shift registers implemented with standard flip-flops use many logic cells for large
shift registers. The ALTSHIFT_TAPS megafunction is implemented in the device
memory blocks, saving logic cells and routing resources. In a complicated design such
as a digital signal processing (DSP) application that requires local data storage, it is
more efficient to implement an ALTSHIFT_TAPS megafunction as the shift register.
The ALTSHIFT_TAPS megafunction is a parameterized shift register with taps. The
taps provide data outputs from the shift register at certain points in the shift register
chain. You can add additional logic that uses the output from these taps for further
applications. The megafunction’s output tap feature is useful for applications such as
the Linear Feedback Shift Register (LFSR) and Finite Impulse Response (FIR) filters.
Features
The ALTSHIFT_TAPS megafunction implements a shift register with taps and offers
additional features, which include:
■ Selectable RAM block type
■ A wide range of widths for the shiftin and shiftout ports
■ Support for output taps at certain points in the shift register chain
■ Selectable distance between taps
General Description
The ALTSHIFT_TAPS megafunction can be easily configured and built through the
Shift Register (RAM-based) MegaWizard
® Plug-In Manager in the Quartus ® II
software.
Chapter 2, Getting Started guides you through each page of the MegaWizard Plug-In
Manager with explanations for each of the options.
The ALTSHIFT_TAPS megafunction is implemented in the embedded memory block
of all supported device families with simple dual-port RAM. You can select the RAM
block type according to the capacity you require. The capacity that is represented by
the width and the depth of the memory block depends on the TAP_DISTANCE,
NUMBER_OF_TAPS
, and WIDTH parameters of the ALTSHIFT_TAPS megafunction.
f For the features and capacities of the typical memory block, refer to the chapter of
your device handbook that contains information about TriMatrix embedded memory
blocks.
The ALTSHIFT_TAPS megafunction supports single-bit and multiple-bit data shifting
at one clock cycle, depending on the width of the shiftin and shiftout ports. For
example, if the shiftin and shiftout ports are single-bit data, only one bit is shifted
per clock cycle. If the shiftin and shiftout ports are multiple-bit data, such as one-
word data (8-bit), the whole word is shifted per clock cycle.
The megafunction also supports output taps at certain points in the shift register
chain, but the tap points must be evenly spaced. The space between taps is set by the
TAP_DISTANCE
parameter in the MegaWizard Plug-in Manager.