Altera Designing With Low-Level Primitives User Manual

Page 37

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Altera Corporation

2–15

April 2007

Designing with Low-Level Primitives User Guide

Primitive Reference

Table 2–7

lists the ports and parameters of the

ALT_OUTBUF_TRI_DIFF

primitive, and their respective description and possible values.

Each parameter except

slew_rate also accepts the value “none”.

Assigning the value “

none” to any such parameter is equivalent to not

setting the parameter. The parameter

slew_rate accepts the value –1 as

the default. Assigning –1 to

slew_rate is equivalent to not setting the

parameter. Note that the primitive requires that all four ports (

i, oe, o,

and

obar) are connected. Also note that all parameters are optional.

Example 2–11

shows a Verilog HDL example and

Example 2–12

shows a

VHDL example of an

ALT_OUTBUF_TRI_DIFF.

Table 2–7. ALT_OUTBUF_TRI_DIFF Ports and Parameters

Port/Parameter

Description/Value

Input Ports

i

Connect this port to the logic in the design that generates the output signal.

oe

Connect this port to the tri-state output enable logic.

Output Ports

o

This port represents the positive pin of a differential I/O standard.
Connect this port to the device’s output pin or a wire to be connected to the
device’s output. There must be no logic between the

o

port and the chip output

pin. This port cannot have multiple fan-outs.

obar

This port represents the negative pin of a differential I/O standard.
Connect this port to the device’s output pin or a wire to be connected to the
device’s output. There must be no logic between the

obar

port and the chip

output pin. This port cannot have multiple fan-outs.

Parameter Name

io_standard

Any legal differential I/O standard value.

current_strength

Any legal value of the

current_strength_new

QSF assignment.

location

Any legal pin location for the current device.

slew_rate

Any legal slew rate value for the current device. This value must be a positive
integer (including

0

).

enable_bus_hold

Whether or not to enable bus-hold circuitry. Current legal values are “

on

” and

off

”.

weak_pull_up_resistor

Whether or not to enable the weak pull-up resistor. Current legal values are

on

” and “

off

”.

termination

Any legal on-chip-termination value for the current device.

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