Altera Designing With Low-Level Primitives - Manual (Page 41)

Altera Corporation 2–19
April 2007 Designing with Low-Level Primitives User Guide
Primitive Reference
ALT_IOBUF_DIFF
This primitive allows you to name and connect positive and negative pins
when a differential I/O standard is used for a bidirectional pin. You can
assign I/O standard, location, drive strength (current strength), slew rate,
and termination assignments, enable bus hold circuitry, and enable weak
pull-up resistor on the
bidir pins. An attempt to set any other parameter
will result in an error.
Table 2–8 lists the ports and parameters of the ALT_IOBUF_DIFF
primitive, and their respective descriptions and possible values.
Table 2–8. ALT_IOBUF_DIFF Ports and Parameters (Part 1 of 2)
Port/Parameter Description/Value
Input Port
i Connect this port to the logic in the design that generates the output signal.
oe Connect this port to the tri-state output enable logic.
Output Ports
o Connect this port to the logic in the design that receives the input signal.
Bidirectional Port
io This port represents the positive pin of a differential I/O standard.
Connect this port to the device’s bidir pin or an entity bidir port. There
must be no logic between the io port and the chip bidir port.
iobar This port represents the negative pin of a differential I/O standard.
Connect this port to the device’s bidir pin, or an entity bidir port. There
must be no logic between the iobar port and the chip bidir port.
Parameter Name
io_standard Any legal differential I/O standard value.
current_strength Any legal value of the current_strength_new QSF assignment.
location Any legal pin location for the current device.
slew_rate Any legal slew rate value for the current device. This value must be a positive
integer (including 0).
enable_bus_hold The ability to enable bus-hold circuitry. Current legal values are “ on ” and “ off ”.
weak_pull_up_resistor The ability to enable the weak pull-up resistor. Current legal values are “ on ” and
“ off ”.