Altera Designing With Low-Level Primitives - Manual (Page 7)

Altera Corporation 1–1
April 2007
1. Low-Level Primitive
Design
Introduction Your hardware description language (HDL) coding style can have a
significant effect on the quality of results that you achieve for
programmable logic designs. Although synthesis tools optimize HDL
code for both logic utilization and performance, sometimes the best
optimizations require engineering knowledge of the design. Therefore, it
is important to consider the HDL coding style that you adopt when
creating your programmable logic design.
Low-level HDL design is the practice of using low-level primitives and
assignments in your HDL code to dictate a particular hardware
implementation for a piece of logic. Low-level primitives are small
architectural building blocks that assist you in creating your design. With
the Quartus
® II software, you have the option of using low-level HDL
design techniques that can help you to achieve better resource utilization
or faster timing results.
Using low-level primitives in your design enables you to control the
hardware implementation for a cone of logic in your design. These cones
can be as small as an LCELL instantiation, which prevents the Quartus II
synthesis engine from performing optimizations, to larger, more complex
examples that specify the encoding method for a finite state machine
(FSM).
The Quartus II software can synthesize and place and route designs that
instantiate low-level primitives. This user guide describes the support
that the Quartus II software offers for creating a design with primitives
and includes the definition of each primitive, usage guidelines, and
example designs.
Using the Quartus II software, you can instantiate a Quartus II primitive
into your HDL design. The source files for Quartus II primitives are built
into the Quartus II software.