Altera DSP Development Kit, Stratix V Edition - Manual (Page 12)

2–2 Chapter 2: Getting Started
References
DSP Development Kit, Stratix V Edition July 2013 Altera Corporation
User Guide
References
Use the following links to check the Altera website for other related information:
■ To learn how Altera FPGAs have overcome traditional FPGA floating-point
challenges, refer to the
An independent Analysis of Altera's FPGA Floating-point DSP
Design Flow white paper by the staff of Berkeley Design Technology, Inc.
■ To learn how it is possible to achieve one teraFLOPS performance with Stratix V
devices, refer to the
Achieving One TeraFLOPS with 28-nm FPGAs white paper.
■ For information on the DSP Builder, refer to the DSP Builder page.
■ For a free trial of the MATLAB & Simulink for use with DSP Builder, refer to the
MathWorks website (
www.mathworks.com ).
■ For DSP Builder design examples, refer to the DSP Designs Examples page.
■ For the latest board design files and reference designs, refer to the DSP
Development Kit, Stratix V Edition page.
■ For additional daughter cards available for purchase, refer to the Development
Board Daughtercards page.
■ For the Stratix V GS device documentation, refer to the Documentation: Stratix V
Devices page.
■ To purchase devices from the eStore, refer to the Devices page.
■ For Stratix V GS OrCAD symbols, refer to the Capture CIS Symbols page.
■ For Nios II 32-bit embedded processor solutions, refer to the Embedded
Processing page.