Temperature information, Power information, Power graph – Altera DSP Development Kit, Stratix V Edition User Manual

Page 47: Graph settings, Reset, The clock control, The clock control –23

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Chapter 6: Board Test System

6–23

The Clock Control

July 2013

Altera Corporation

DSP Development Kit, Stratix V Edition

User Guide

f

A table with the power rail information is available in the

DSP Development

Kit, Stratix V Edition Reference Manual

.

Temperature Information

The Temperature information controls display the following temperature readings
for the board and the FPGA on the board:

FPGA

—Indicates the temperature of the FPGA device.

Board

—Indicates the overall board temperature.

Power Information

The Power information control displays current, maximum, and minimum power
readings for the following units:

mAmp

Power Graph

The power graph displays the mA power consumption of your board over time. The
green line indicates the current value. The red line indicates the maximum value read
since the last reset. The yellow line indicates the minimum value read since the last
reset.

Graph Settings

The following Graph settings controls allow you to define the look and feel of the
power graph:

Scale select

—Specifies the amount to scale the power graph. Select a smaller

number to zoom in to see finer detail. Select a larger number to zoom out to see the
entire range of recorded values.

Update speed

—Specifies how often to refresh the graph.

Reset

This Reset control clears the graph, resets the minimum and maximum values, and
restarts the Power Monitor.

The Clock Control

The Clock Control application sets the Si570, Si571, and the two Si5338 programmable
oscillators. The Si570 and Si571 can be set between 10 MHz and 810 MHz. The Si570
drives a 2-to-4 buffer that drives a copy of the clock to all four edges of the FPGA. The
two Si5338 devices each have four independently programmable outputs. All four
outputs are programmable between 16 KHz and 350 MHz. All four outputs can
support the higher frequencies, but they cannot be programmed for multiple
frequencies above 350 MHz. If you want multiple outputs above 350 MHz, all outputs
above 350 MHz must be the same frequency, and must be frequencies from 367 MHz
to 473.33 MHz or from 550 MHz to 710 MHz.

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