Altera PowerPlay Early Power Estimator - Manual (Page 22)

3–8 Altera Corporation
PowerPlay Early Power Estimator For Arria GX FPGAs May 2008
PowerPlay Early Power Estimator Inputs
Figure 3–3. 4-Bit Counter Example
Figure 3–4 shows the device PowerPlay Early Power Estimator
spreadsheet and the estimated power consumed by the logic in this
design.
Figure 3–4. Logic Section in the PowerPlay Early Power Estimator
PRN
CLRN
T Q
TFF
PRN
CLRN
T Q
TFF
PRN
CLRN
T Q
TFF
PRN
CLRN
T Q
TFF
V
CC
V
CC
V
CC
V
CC
cout2 cout1 cout0 clock
cout3
OUTPUT
cout0 cout0
OUTPUT
cout3 cout3
OUTPUT
cout2 cout2
OUTPUT
cout1 cout1