Altera PowerPlay Early Power Estimator - Manual (Page 47)

Altera Corporation 3–33
May 2008 PowerPlay Early Power Estimator For Arria GX FPGAs
Using the PowerPlay Early Power Estimator
Thermal Analysis
You can choose to enter T
J
directly or compute T
J
based on information
provided. If you choose to enter T
J
, select User Entered T
J
in the Input
Parameters section. If you choose to automatically compute T
J
, select
Auto Computed T
J
in the Input Parameters section.
When automatically computing T
J
, the device’s ambient temperature, the
airflow, the heat sink solution and the board thermal model are
considered to determine the junction temperature (T
J
) in degrees Celsius.
T
J
is the estimated operating junction temperature based on your device
and thermal conditions.
The device can be considered a heat source and the junction temperature
is the temperature at the device. For simplicity, assume that the
temperature of the device is constant regardless of where it is being
measured. In reality, the temperature varies across the device.
Power can be dissipated from the device through many paths. Different
paths become significant depending on the thermal properties of the
system. In particular, the significance of power dissipation paths vary
depending on whether or not a heat sink is being used for the device.
Not Using a Heat Sink
When a heat sink is not used the major paths of power dissipation are
from the device to the air. This can be referred to as a junction-to-ambient
thermal resistance (
θ
JA
). In this case there are two significant
junction-to-ambient thermal resistance paths. The first is from the device
through the case to the air and the second is from the device through the
board to the air.
Figure 3–23 shows the thermal representation without a
heat sink.
P
s t a t i c
This shows the static power consumed irrespective of clock frequency. Does not include
static I/O current due to termination resistors, which is included in the I/O power above.
P
s t a t i c
is affected by junction temperature, selected device, and power characteristics.
TOTAL This shows the total power dissipated as heat from the FPGA. Does not include power
dissipated in off-chip termination resistors.
See Power Supply Current for current draw from the FPGA supply rails. This may differ
due to currents supplied to off-chip components and thus not dissipated as heat in the
FPGA.
Table 3–12. Thermal Power Section Information
Column Heading Description