Altera Stratix IV GT 100G - Manual (Page 55)

Chapter 6: Board Test System 6–33
Configuring the FPGA Using the Quartus II Programmer
October 2010 Altera Corporation Stratix IV GT 100G Development Kit User Guide
Disable ALL
Disables all of the outputs of the clock generator.
Read
Reads the register values and calculates the frequency based on these values.
Clear
Resets the device and puts it back in the factory default state.
Set New Frequency
The Set New Frequency control sets the desired frequency after this button is pressed.
Configuring the FPGA Using the Quartus II Programmer
You can use the Quartus II Programmer to configure the FPGA with a specific SRAM
Object File (.sof). Before configuring the FPGA, ensure that the Quartus II
Programmer and the USB-Blaster driver are installed on the host computer, the USB
cable is connected to the 100G development board, power to the board is on, and no
other applications that use the JTAG chain are running.
To configure the Stratix IV GT FPGA, perform the following steps:
1. Start the Quartus II Programmer.
2. Click Add File and select the path to the desired .sof.
3. Turn on the Program/Configure option for the added file.
4. Click Start to download the selected file to the FPGA. Configuration is complete
when the progress bar reaches 100%.
1
Using the Quartus II programmer to configure a device on the board causes other
JTAG-based applications such as the Board Test System and the Power Monitor to
loose their connection to the board. Restart those applications after configuration is
complete.