Altera Stratix V Advanced Systems - Manual (Page 34)

5–16 Chapter 5: Board Test System
The Clock Control
Stratix V Advanced Systems Development Kit February 2013 Altera Corporation
User Guide
The Clock Control application runs as a stand-alone application. ClockControl.exe
resides in the
<install dir>\kits\stratixVGX_5sgxea7nf45_as\examples\board_test_system
directory. On Windows, click Start > All Programs > Altera > Stratix V Advanced
Systems Development Kit
<version> > Clock Control to start the application.
f For more information about the Si5338 oscillator and the Stratix V GX advanced
systems board’s clocking circuitry, default frequencies, and clock input pins, refer to
the
Stratix VAdvanced Systems Development Board Reference Manual .
The Clock Control communicates with the MAX V device on the board through the
JTAG bus. The Si5338 (U53, U82, U91, U95, and U100) programmable oscillators are
connected to the MAX V device through a 2-wire serial bus. Clock frequencies will
return to the default values after power cycling the board.
Figure 5–8 shows the Clock
Control.
The following sections describe the Clock Control controls.
Read
The read control reads the current frequency setting for the oscillator associated with
the active tab.
Default
The Default control sets the frequency for the oscillator associated with the active tab
back to its default value. This can also be accomplished by power cycling the board.
Figure 5–8. The Clock Control