KEPCO TMA 4882-27 - Manual (Page 48)

A-2
TMA4882-27 021910
Description: Returns the mask stored in the Standard Event Status Enable Register. Contents of Standard
Event Status Enable register (*ESE) determine which bits of Standard Event Status register (*ESR)
are enabled, allowing them to be summarized in the Status Byte register (*STB). All of the enabled
events of the Standard Event Status Enable Register are logically OR-ed to cause ESB (bit 5) of the
Status Byte Register to be set (1 = set = enable function, 0 = reset = disable function). (See example,
Figure A-1.)
A.5 *ESR? — EVENT STATUS REGISTER QUERY
*ESR?
Syntax: *ESR?
Return value: <integer> (Value = contents of Event Status register as defined in Table A-2.)
Description: Causes the power supply to return the contents of the Standard Event Status register. After it
has been read, the register is cleared. The Standard Event Status register bit configuration is
defined in Table A-2(1 = set, 0 = reset). Related Commands: *CLS, *ESE, *OPC. (See example, Fig-
ure A-1.)
A.6 *IDN? — IDENTIFICATION QUERY
*IDN?
Syntax: *IDN?
Return value: Character string
Description: Identifies the instrument. This query requests identification. The string contains the manufacturer
name, model, SN, firmware revs. The SN field is normally used for the serial #, but since serial #s are
not stored in memory, the channel # is given instead. The firmware revision consists of the controller
rev. and power module rev. separated by a ‘-'. If no module is present at the selected channel, PSC
(Power Supply Controller) is given as the model. Supported models include MAT, MBT, and MST The
character string contains the following fields: <Manufacturer>, <Model>, <Serial Number>, <Firmware
revision> where: <Manufacturer> = KEPCO, <Model> = BOP, <Serial Number> = MM,DD,YY-SSS
(MM - month, DD - day, YY - year, SSS - serial number in that day) <Firmware revision>=n.m (n.m
revision, e.g, 1.0) (See example, Figure A-1.)
The model identified in the *IDN? query after power up of the controller is the device connected to the
BITBUS with an address of 1. If no device is set to be address 1 then the power up IDN string returned
will contain the model identifier of PSC. The model identifier reflects the type of power supply at a spe-
cific BITBUS address. figure B-3 shows an example of the model identifier after specifying any device.
A.7 *OPC — OPERATION COMPLETE COMMAND
*OPC
Syntax: *OPC
Description: Causes power supply to set status bit 0 (Operation Complete) when pending operations are
complete This command sets Standard Event Status Register bit 0 (see Table A-2) to “1” when all pre-
vious commands have been executed and changes in output level have been completed. This com-
mand does not prevent processing of subsequent commands, but bit 0 will not be set until all pending
operations are completed. (1 = set = enable function, 0 = reset = disable function). (See example, Fig-
ure A-1.) As an example, the controller sends command(s), then sends *OPC. If controller then sends
*ESR?, the power supply responds with either a “0” (if the power supply is busy executing the pro-
grammed commands), or a “1” (if the previously programmed commands are complete). (See exam-
ple, Figure A-1.)
A.8 *OPC? — OPERATION COMPLETE QUERY
*OPC?
Syntax: *OPC?
Return value: <1> (ASCII) placed in output queue when power supply has completed operation.
Description: Indicates when pending operations have been completed.When all pending operations are com-
plete (all previous commands have been executed and changes in output level have been completed)
a “1” is placed in the Output Queue. Subsequent commands are inhibited until the pending operations
are completed. *OPC? is intended to be used at the end of a command line so that the application pro-
gram can monitor the bus for data until it receives the “1” from the power supply Output Queue. (See
example, Figure A-1.)