Avago Technologies LSI53C896 - Manual (Page 298)

6-30 Specifications
Version 3.3 Copyright © 1998–2003 by LSI Logic Corporation. All rights reserved.
Table 6.27 Burst Read, 32-Bit Address and Data
Symbol Parameter Min Max Unit
t
1
Shared signal input setup time 7 – ns
t
2
Shared signal input hold time 0 – ns
t
3
CLK to shared signal output valid 2 11 ns