Figure2.1 lsi53c896 block diagram, Lsi53c896 block diagram, Figure 2.1 – Avago Technologies LSI53C896 User Manual
Page 30
2-2
Functional Description
Version 3.3
Copyright © 1998–2003 by LSI Logic Corporation. All rights reserved.
Figure 2.1
LSI53C896 Block Diagram
8 Kbyte
SCRIPTS RAM
8 Dword SCRIPTS
Prefetch Buffer
Oper
ating
Registers
SCSI SCRIPTS
Processor
944 Byte
DMA FIFO
SCSI FIFO and SCSI Control Block
Universal TolerANT
Drivers and Receivers
64-Bit PCI Interface, PCI Configuration Registers (2 Sets)
Wide Ultra2 SCSI Controller
Ser
ial EEPR
OM Controller
and A
utoconfigur
ation
R
OM/Flash Memor
y Control
Local
Bus
Memory
SCSI SCRIPTS
Processor
944 Byte
DMA FIFO
SCSI FIFO and SCSI Control Block
Universal TolerANT
Drivers and Receivers
Wide Ultra2 SCSI Controller
Oper
ating
Registers
PCI Bus
SCSI Function B
Wide Ultra2
SCSI Bus
SCSI Function A
Wide Ultra2
SCSI Bus
JTAG
ROM/Flash
Memory
Bus
2-Wire Serial
EEPROM Bus
(Function A)
2-Wire Serial
EEPROM Bus
(Function B)
JTAG
Bus
8 Kbyte
SCRIPTS RAM
8 Dword SCRIPTS
Prefetch Buffer