Freescale Semiconductor 56F8122 - Manual (Page 20)

56F8322 Techncial Data, Rev. 10.0
20 Freescale Semiconductor
Preliminary
INDEX0
(TA2)
(GPIOB5)
(SYS_CLK)
36 Schmitt
Input
Schmitt
Input/
Output
Schmitt
Input/
Output
Output
Input
Input
Input
Output
Index — Quadrature Decoder 0, INDEX input
TA2 — Timer A, Channel 2
Port B GPIO — This GPIO pin can be individually programmed as an
input or output pin.
Clock Output - can be used to monitor the internal SYS_CLK signal
(see
Section 6.5.7 CLKO Select Register, SIM_CLKOSR).
In the 56F8322, the default state after reset is INDEX0.
In the 56F8122, the default state is not one of the functions offered
and must be reconfigured.
HOME0
(TA3)
(GPIOB4)
(prescaler_
clock)
35 Schmitt
Input
Schmitt
Input/
Output
Schmitt
Input/
Output
Output
Input
Input
Input
Output
Home — Quadrature Decoder 0, HOME input
TA3 — Timer A, Channel 3
Port B GPIO — This GPIO pin can be individually programmed as an
input or output pin.
Clock Output - can be used to monitor the internal prescaler_clock
signal (see
Section 6.5.7 CLKO Select Register, SIM_CLKOSR).
In the 56F8322, the default state after reset is HOME0.
In the 56F8122, the default state is not one of the functions offered
and must be reconfigured.
SCLK0
(GPIOB3)
19 Schmitt
Input/
Output
Schmitt
Input/
Output
Tri-stated
Input
SPI 0 Serial Clock — In the master mode, this pin serves as an
output, clocking slaved listeners. In slave mode, this pin serves as the
data clock input. A Schmitt trigger input is used for noise immunity.
Port B GPIO — This GPIO pin can be individually programmed as an
input or output pin.
After reset, the default state is SCLK0.
Table 2-2 Signal and Package Information for the 48-Pin LQFP
Signal Name Pin No. Type
State During
Reset
Signal Description