Freescale Semiconductor 56F8122 - Manual (Page 22)

56F8322 Techncial Data, Rev. 10.0
22 Freescale Semiconductor
Preliminary
PWMA1
(GPIOA1)
4 Schmitt
Output
Schmitt
Input/
Output
Tri-stated
Input
PWMA1 — This is one of six PWMA output pins.
Port A GPIO - This GPIO pin can be individually programmed as an
input or output pin.
In the 56F8322, the default state after reset is PWMA1.
In the 56F8122, the default state is not one of the functions offered
and must be reconfigured.
PWMA2
(SS1)
(GPIOA2)
6 Ou tpu t
Schmitt
Input
Schmitt
Input/
Output
Tri-stated
Input
Input
PWMA2 — This is one of six PWMA output pins.
SPI 1 Slave Select — SS1 is used in slave mode to indicate to the
SPI module that the current transfer is to be received.
Port A GPIO — This GPIO pin can be individually programmed as an
input or output pin.
In the 56F8322, the default state after reset is PWMA2.
In the 56F8122, the default state is not one of the functions offered
and must be reconfigured.
PWMA3
(MISO1)
(GPIOA3)
7 Ou tpu t
Schmitt
Input/
Output
Schmitt
Input/
Output
Tri-stated
Input
Input
PWMA3 — This is one of six PWMA output pins.
SPI 1 Master In/Slave Out — This serial data pin is an input to a
master device and an output from a slave device. The MISO line of a
slave device is placed in the high-impedance state if the slave device
is not selected. The slave device places data on the MISO line a
half-cycle before the clock edge the master device uses to latch the
data.
Port A GPIO — This GPIO pin can be individually programmed as an
input or output pin.
In the 56F8322, the default state after reset is PWMA3.
In the 56F8122, the default state is not one of the functions offered
and must be reconfigured.
Table 2-2 Signal and Package Information for the 48-Pin LQFP
Signal Name Pin No. Type
State During
Reset
Signal Description