Freescale Semiconductor 56F8122 - Manual (Page 43)

Peripheral Memory Mapped Registers
56F8322 Technical Data, Rev. 10.0
Freescale Semiconductor 43
Preliminary
ADCA_HLMT 1 $1A High Limit Register 1
ADCA_HLMT 2 $1B High Limit Register 2
ADCA_HLMT 3 $1C High Limit Register 3
ADCA_HLMT 4 $1D High Limit Register 4
ADCA_HLMT 5 $1E High Limit Register 5
ADCA_HLMT 6 $1F High Limit Register 6
ADCA_HLMT 7 $20 High Limit Register 7
ADCA_OFS 0 $21 Offset Register 0
ADCA_OFS 1 $22 Offset Register 1
ADCA_OFS 2 $23 Offset Register 2
ADCA_OFS 3 $24 Offset Register 3
ADCA_OFS 4 $25 Offset Register 4
ADCA_OFS 5 $26 Offset Register 5
ADCA_OFS 6 $27 Offset Register 6
ADCA_OFS 7 $28 Offset Register 7
ADCA_POWER $29 Power Control Register
ADCA_CAL $2A ADC Calibration Register
Table 4-14 Temperature Sensor Register Address Map
(TSENSOR_BASE = $00 F270)
Temperature Sensor is NOT available in the 56F8122 device
Register Acronym Address Offset Register Description
TSENSOR_CNTL $0 Control Register
Table 4-15 Serial Communication Interface 0 Registers Address Map
(SCI0_BASE = $00 F280)
Register Acronym Address Offset Register Description
SCI0_SCIBR $0 Baud Rate Register
SCI0_SCICR $1 Control Register
Reserved
SCI0_SCISR $3 Status Register
SCI0_SCIDR $4 Data Register
Table 4-13 Analog to Digital Converter Registers Address Map (Continued)
(ADCA_BASE = $00 F200)
Register Acronym Address Offset Register Description