Freescale Semiconductor MC68HC08KH12 User Manual

Freescale Semiconductor Hardware

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Table of contents

Document Outline

List of Sections
Table of Contents
General Description
Section 2. Memory Map
Section 3. Random-Access Memory (RAM)
Section 4. Read-Only Memory (ROM)
Section 5. Configuration Register (CONFIG)
Section 6. Central Processor Unit (CPU)
Section 7. System Integration Module (SIM)
Section 8. Clock Generator Module (CGM)
Section 9. Universal Serial Bus Module (USB)
Section 10. Monitor ROM (MON)
Section 11. Timer Interface Module (TIM)
Section 12. I/O Ports
Section 13. Computer Operating Properly (COP)
Section 14. External Interrupt (IRQ)
Section 15. Keyboard Interrupt Module (KBI)
Section 16. Break Module (BREAK)
Section 17. Preliminary Electrical Specifications
Section 18. Mechanical Specifications
List of Figures
List of Tables
Section 1. General Description
- 1.1 Contents
- 1.2 Introduction
- 1.3 Features
- 1.4 MCU Block Diagram
- 1.5 Pin Assignments
Section 2. Memory Map
- 2.1 Contents
- 2.2 Introduction
- 2.3 I/O Section
- 2.4 Monitor ROM
Section 3. Random-Access Memory (RAM)
- 3.1 Contents
- 3.2 Introduction
- 3.3 Functional Description
Section 4. Read-Only Memory (ROM)
- 4.1 Contents
- 4.2 Introduction
- 4.3 Functional Description
Section 5. Configuration Register (CONFIG)
- 5.1 Contents
- 5.2 Introduction
- 5.3 Functional Description
Section 6. Central Processor Unit (CPU)
- 6.1 Contents
- 6.2 Introduction
- 6.3 Features
- 6.4 CPU Registers
- 6.5 Arithmetic/Logic Unit (ALU)
Section 7. System Integration Module (SIM)
- 7.1 Contents
- 7.2 Introduction
- 7.3 SIM Bus Clock Control and Generation
- 7.4 Reset and System Initialization
  - 7.4.1 External Pin Reset
  - 7.4.2 Active Resets from Internal Sources
- 7.5 SIM Counter
- 7.6 Exception Control
- 7.7 Low-Power Modes
  - 7.7.1 Wait Mode
  - 7.7.2 Stop Mode
- 7.8 SIM Registers
Section 8. Clock Generator Module (CGM)
- 8.1 Contents
- 8.2 Introduction
- 8.3 Features
- 8.4 Functional Description
- 8.5 I/O Signals
- 8.6 CGM Registers
- 8.7 Interrupts
- 8.8 Special Modes
  - 8.8.1 Wait Mode
  - 8.8.2 CGM During Break Interrupts
- 8.9 Acquisition/Lock Time Specifications
Section 9. Universal Serial Bus Module (USB)
- 9.1 Contents
- 9.2 Features
- 9.3 Overview
- 9.4 I/O Register Description of the HUB function
- 9.5 I/O Register Description of the Embedded Device Function
Section 10. Monitor ROM (MON)
- 10.1 Contents
- 10.2 Introduction
- 10.3 Features
- 10.4 Functional Description
Section 11. Timer Interface Module (TIM)
- 11.1 Contents
- 11.2 Introduction
- 11.3 Features
- 11.4 Functional Description
- 11.5 Interrupts
- 11.6 Wait Mode
- 11.7 TIM During Break Interrupts
- 11.8 I/O Signals
  - 11.8.1 TIM Clock Pin (PTE0/TCLK)
  - 11.8.2 TIM Channel I/O Pins (PTE1/TCH0:PTE2/TCH1)
- 11.9 I/O Registers
Section 12. I/O Ports
- 12.1 Contents
- 12.2 Introduction
- 12.3 Port A
  - 12.3.1 Port A Data Register (PTA)
  - 12.3.2 Data Direction Register A (DDRA)
- 12.4 Port B
  - 12.4.1 Port B Data Register (PTB)
  - 12.4.2 Data Direction Register B (DDRB)
- 12.5 Port C
  - 12.5.1 Port C Data Register (PTC)
  - 12.5.2 Data Direction Register C (DDRC)
- 12.6 Port D
  - 12.6.1 Port D Data Register (PTD)
  - 12.6.2 Data Direction Register D (DDRD)
- 12.7 Port E
- 12.8 Port F
  - 12.8.1 Port F Data Register (PTF)
  - 12.8.2 Data Direction Register F (DDRF)
- 12.9 Port Options
  - 12.9.1 Port Option Control Register (POC)
Section 13. Computer Operating Properly (COP)
- 13.1 Contents
- 13.2 Introduction
- 13.3 Functional Description
- 13.4 I/O Signals
- 13.5 COP Control Register (COPCTL)
- 13.6 Interrupts
- 13.7 Monitor Mode
- 13.8 Low-Power Modes
  - 13.8.1 Wait Mode
  - 13.8.2 Stop Mode
- 13.9 COP Module During Break Mode
Section 14. External Interrupt (IRQ)
- 14.1 Contents
- 14.2 Introduction
- 14.3 Features
- 14.4 Functional Description
  - 14.4.1 IRQ1/Vpp Pin
- 14.5 IRQ Module During Break Interrupts
- 14.6 IRQ Status and Control Register (ISCR)
Section 15. Keyboard Interrupt Module (KBI)
- 15.1 Contents
- 15.2 Introduction
- 15.3 Features
- 15.4 Port-D Keyboard Interrupt Block Diagram
- 15.5 Port-E Keyboard Interrupt Block Diagram
- 15.6 Port-F Keyboard Interrupt Block Diagram
- 15.7 Wait Mode
- 15.8 Stop Mode
- 15.9 Keyboard Module During Break Interrupts
Section 16. Break Module (BREAK)
- 16.1 Contents
- 16.2 Introduction
- 16.3 Features
- 16.4 Functional Description
- 16.5 Break Module Registers
  - 16.5.1 Break Status and Control Register (BRKSCR)
  - 16.5.2 Break Address Registers (BRKH and BRKL)
- 16.6 Low-Power Modes
  - 16.6.1 Wait Mode
  - 16.6.2 Stop Mode
Section 17. Preliminary Electrical Specifications
- 17.1 Contents
- 17.2 Introduction
- 17.3 Absolute Maximum Ratings
- 17.4 Functional Operating Range
- 17.5 Thermal Characteristics
- 17.6 DC Electrical Characteristics
- 17.7 Control Timing
- 17.8 Oscillator Characteristics
- 17.9 USB DC Electrical Characteristics
- 17.10 USB Low Speed Source Electrical Characteristics
- 17.11 USB High Speed Source Electrical Characteristics
- 17.12 HUB Repeater Electrical Characteristics
- 17.13 USB Signaling Levels
- 17.14 TImer Interface Module Characteristics
- 17.15 Clock Generation Module Characteristics
Section 18. Mechanical Specifications
- 18.1 Contents
- 18.2 Introduction
- 18.3 Plastic Quad Flat Pack (QFP)

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