Freescale Semiconductor MC68HC08KH12 - Manual (Page 210)

Advance Information MC68HC(7)08KH12 — Rev. 1.1
210 Freescale Semiconductor
13.4.3 Power-On Reset
The power-on reset (POR) circuit in the SIM clears the SIM counter 4096
CGMXCLK cycles after power-up.
13.4.4 Internal Reset
An internal reset clears the SIM counter and the COP counter.
13.4.5 Reset Vector Fetch
A reset vector fetch occurs when the vector address appears on the data
bus. A reset vector fetch clears the SIM counter.
13.4.6 COPD (COP Disable)
The COPD signal reflects the state of the COP disable bit (COPD) in the
configuration register (CONFIG). (See
Figure 13-2 . Configuration
Register (CONFIG) .)
13.4.7 COPRS (COP Rate Select)
The COPRS signal reflects the state of the COP rate select bit (COPRS)
in the configuration register. (See
Figure 13-2 . Configuration Register
(CONFIG) .)
Address: $001F
Bit 7 6 5 4 3 2 1 Bit 0
Read: 0 0 0 0
SSREC COPRS STOP COPD
Write:
Reset: 0 0 0 0 0 0 0 0
= Unimplemented
This is a write-once after reset register.
(See
Section 5. Configuration Register (CONFIG) .)
Figure 13-2. Configuration Register (CONFIG)