Freescale Semiconductor MC68HC08KH12 - Manual (Page 126)

Advance Information MC68HC(7)08KH12 — Rev. 1.1
126 Freescale Semiconductor
RSTF — USB Reset Flag
This read only bit is set when a valid reset signal state is detected on
the D0+ and D0- lines. This reset detection will also generate an
internal reset signal to reset the CPU and other peripherals including
the USB module. This bit is cleared by writing a logic 1 to the RSTFR
bit.
NOTE: ** Please note RSTF bit is only be reset by a POR reset.
RSTFR — Clear Reset Indicator Bit
Writing a logic 1 to this write only bit will clear the RSTF bit if it is set.
Writing a logic 0 to the RSTFR has no effect. Reset clears this bit.
LOCKF — USB Frame Timer Locked
This read only bit is set when the internal frame timer is locked to the
host timer. This bit is cleared by writing a logic 1 to the LOCKFR bit.
Reset clears this bit.
LOCKFR — Clear Frame Timer Locked Flag
Writing a logic 1 to this write only bit will clear the LOCKF bit if it is set.
Writing a logic 0 to the LOCKFR has no effect. Reset clears this bit.
SOFFR — Start Of Frame Flag Reset
Writing a logic 1 to this write only bit will clear the SOFF bit if it is set.
Writing a logic 0 to the SOFFR has no effect. Reset clears this bit.
EOF2FR — The Second End of Frame Point Flag Reset
Writing a logic 1 to this write only bit will clear the EOF2F bit if it is set.
Writing a logic 0 to the EOF2FR has no effect. Reset clears this bit.
EOPFR — End of Packet Flag Reset
Writing a logic 1 to this write only bit will clear the EOPF bit if it is set.
Writing a logic 0 to the EOPFR has no effect. Reset clears this bit.
TRANFR — Bus Signal Transition Flag Reset
Writing a logic 1 to this write only bit will clear the TRANF bit if it is set.
Writing a logic 0 to the TRANFR has no effect. Reset clears this bit.