Freescale Semiconductor MC68HC08KH12 - Manual (Page 111)

MC68HC(7)08KH12 — Rev. 1.1 Advance Information
Freescale Semiconductor 111
8.9.3 Choosing a Filter Capacitor
As described in 8.9.2 Parametric Influences on Reaction Time , the
external filter capacitor, C
F
, is critical to the stability and reaction time of
the PLL. The PLL is also dependent on reference frequency and supply
voltage. The value of the capacitor must, therefore, be chosen with
supply potential and reference frequency in mind. For proper operation,
the external filter capacitor must be chosen according to this equation:
For the value of V
DDA
, choose the voltage potential at which the MCU is
operating. If the power supply is variable, choose a value near the middle
of the range of possible supply values.
This equation does not always yield a commonly available capacitor
size, so round to the nearest available size. If the value is between two
different sizes, choose the higher value for better stability. Choosing the
lower size may seem attractive for acquisition time improvement, but the
PLL may become unstable. Also, always choose a capacitor with a tight
tolerance (
±
20 percent or better) and low dissipation.
8.9.4 Reaction Time Calculation
The actual acquisition and lock times can be calculated using the
equations below. These equations yield nominal values under the
following conditions:
• Correct selection of filter capacitor, C
F
(See 8.9.3 Choosing a
Filter Capacitor .)
• Room temperature operation
• Negligible external leakage on CGMXFC
• Negligible noise
The K factor in the equations is derived from internal PLL parameters.
K
ACQ
is the K factor when the PLL is configured in acquisition mode, and
K
TRK
is the K factor when the PLL is configured in tracking mode. (See
8.4.4 Acquisition and Tracking Modes .) Reaction time is based on
C
F
C
FACT
V
DDA
f
RDV
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