2 port-d keyboard interrupt enable register, Port-d keyboard interrupt enable register, Port-d keyboard interrupt enable register (kbdier) – Freescale Semiconductor MC68HC08KH12 User Manual

Page 226

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Advance Information

MC68HC(7)08KH12

Rev. 1.1

226

Freescale Semiconductor

KEYDF — Port-D Keyboard Flag Bit

This read-only bit is set when a keyboard interrupt is pending on
port-D. Reset clears the KEYDF bit.

1 = Keyboard interrupt pending
0 = No keyboard interrupt pending

ACKD — Port-D Keyboard Acknowledge Bit

Writing a logic 1 to this write-only bit clears the keyboard interrupt
request on port-D. ACKD always reads as logic 0. Reset clears
ACKD.

IMASKD — Port-D Keyboard Interrupt Mask Bit

Writing a logic 1 to this read/write bit prevents the output of the
keyboard interrupt mask from generating interrupt requests on port-D.
Reset clears the IMASKD bit.

1 = Keyboard interrupt requests masked
0 = Keyboard interrupt requests not masked

MODED — Port-D Keyboard Triggering Sensitivity Bit

This read/write bit controls the triggering sensitivity of the keyboard
interrupt pins on port-D. Reset clears MODED.

1 = Keyboard interrupt requests on falling edges and low levels
0 = Keyboard interrupt requests on falling edges only

15.4.3.2 Port-D Keyboard Interrupt Enable Register

The port-D keyboard interrupt enable register enables or disables each
port-D pin to operate as a keyboard interrupt pin.

Address: $000D

Bit 7

6

5

4

3

2

1

Bit 0

Read:

KBDIE7

KBDIE6

KBDIE5

KBDIE4

KBDIE3

KBDIE2

KBDIE1

KBDIE0

Write:

Reset:

0

0

0

0

0

0

0

0

Figure 15-3. Port-D Keyboard Interrupt Enable Register (KBDIER)

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