Freescale Semiconductor MC68HC08KH12 - Manual (Page 223)

MC68HC(7)08KH12 — Rev. 1.1 Advance Information
Freescale Semiconductor 223
15.4.1 Port-D Keyboard Interrupt Functional Description
Writing to the KBDIE7–KBDIE0 bits in the keyboard interrupt enable
register independently enables or disables each port D pin as a
keyboard interrupt pin. Enabling a keyboard interrupt pin in port-D also
enables its internal pullup device. A logic 0 applied to an enabled
keyboard interrupt pin latches a keyboard interrupt request.
A keyboard interrupt is latched when one or more keyboard pins goes
low after all were high. The MODED bit in the keyboard status and
control register controls the triggering mode of the keyboard interrupt.
• If the keyboard interrupt is edge-sensitive only, a falling edge on a
keyboard pin does not latch an interrupt request if another
keyboard pin is already low. To prevent losing an interrupt request
on one pin because another pin is still low, software can disable
the latter pin while it is low.
• If the keyboard interrupt is falling edge- and low level-sensitive, an
interrupt request is present as long as any keyboard pin is low.
If the MODED bit is set, the keyboard interrupt pins are both falling edge-
and low level-sensitive, and both of the following actions must occur to
clear a keyboard interrupt request:
• Vector fetch or software clear — A vector fetch generates an
interrupt acknowledge signal to clear the interrupt request.
Software may generate the interrupt acknowledge signal by
writing a logic 1 to the ACKD bit in the keyboard status and control
register KBDSCR. The ACKD bit is useful in applications that poll
the keyboard interrupt pins and require software to clear the
keyboard interrupt request. Writing to the ACKD bit prior to leaving
an interrupt service routine can also prevent spurious interrupts
due to noise. Setting ACKD does not affect subsequent transitions
on the keyboard interrupt pins. A falling edge that occurs after
writing to the ACKD bit latches another interrupt request. If the
keyboard interrupt mask bit, IMASKD, is clear, the CPU loads the
program counter with the vector address at locations $FFEA and
$FFEB.