Intel Extensible Firmware Interface - Manual (Page 38)

Extensible Firmware Interface Specification
1-12 12/01/02 Version 1.10
1.8 Conventions Used in This Document
This document uses typographic and illustrative conventions described below.
1.8.1 Data Structure Descriptions
Intel architecture processors of the IA-32 family are “little endian” machines. This distinction
means that the low-order byte of a multibyte data item in memory is at the lowest address, while the
high-order byte is at the highest address. Intel Itanium processors may be configured for both
“little endian” and “big endian” operation. All implementations designed to conform to this
specification will use “little endian” operation.
In some memory layout descriptions, certain fields are marked reserved. Software must initialize
such fields to zero and ignore them when read. On an update operation, software must preserve any
reserved field.
1.8.2 Protocol Descriptions
A protocol description generally has the following format:
Protocol:
The formal name of the protocol interface.
Summary: A brief description of the protocol interface.
GUID: The 128-bit unique identifier for the protocol interface.
Revision Number: The revision of the protocol interface.
Protocol Interface Structure:
A “C-style” data structure definition containing the
procedures and data fields produced by this protocol
interface.
Parameters: A brief description of each field in the protocol interface
structure.
Related Definitions: The type declarations and constants that are used in the
protocol interface structure or any of its procedures.
Description: A description of the functionality provided by the
protocol interface including any limitations and caveats
of which the caller should be aware.