Divu, Divu syntax, Description – Intel Extensible Firmware Interface User Manual

Page 799: Operation, Behaviors and restrictions

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EFI Byte Code Virtual Machine

Version 1.10

12/01/02

19-25

DIVU

SYNTAX:

DIVU[32|64] {@}R

1

, {@}R

2

{Index16|Immed16}

DESCRIPTION:

Performs a divide operation on two unsigned operands and stores the result to Operand 1. The
operation can be performed on either 32-bit (DIVU32) or 64-bit (DIVU64) operands.

OPERATION:

Operand 1 <= Operand 1 / Operand 2

Table 19-17 DIVU Instruction Encoding

BYTE DESCRIPTION

Bit Description

7

0 = Immediate/index absent

1 = Immediate/index present

6

0 = 32-bit operation

1 = 64-bit operation

0

0..5

Opcode = 0x11

Bit Description

7

0 = Operand 2 direct

1 = Operand 2 indirect

4..6 Operand

2

3

0 = Operand 1 direct

1 = Operand 1 indirect

1

0..2 Operand

1

2..3

Optional 16-bit immediate data/index

BEHAVIORS AND RESTRICTIONS:

• If Operand 2 is indirect, then the immediate data is interpreted as an index, and the value is

fetched from memory as an unsigned value at address [R

2

+ Index16].

• If Operand 2 is direct, then the immediate data is considered an unsigned value and is added to

the Operand 2 register contents such that Operand 2 = R

2

+ Immed16

• For the DIVU32 form, if Operand 1 is direct then the upper 32 bits of the result are set to 0

before storing back to the Operand 1 register.

• A divide-by-0 exception occurs if Operand 2 = 0.

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