5 ebc instruction operands, 1 direct operands, 2 indirect operands – Intel Extensible Firmware Interface User Manual

Page 781

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EFI Byte Code Virtual Machine

Version 1.10

12/01/02

19-7

19.5 EBC Instruction Operands

The VM supports an EBC instruction set that performs data movement, data manipulation,
branching, and other miscellaneous operations typical of a simple processor. Most instructions
operate on two operands, and have the general form:

INSTRUCTION Operand1, Operand2

Typically, instruction operands will be one of the following:
• Direct
• Indirect
• Indirect with index
• Immediate
The following subsections explain these operands.

19.5.1 Direct

Operands

When a direct operand is specified for an instruction, the data to operate upon is contained in one of
the VM general-purpose registers R0-R7. Syntactically, an example of direct operand mode could
be the

ADD

instruction:

ADD64 R1, R2

This form of the instruction utilizes two direct operands. For this particular instruction, the VM
would take the contents of register R2, add it to the contents of register R1, and store the result in
register R1.

19.5.2 Indirect

Operands

When an indirect operand is specified, a VM register contains the address of the operand data. This
is sometimes referred to as register indirect, and is indicated by prefixing the register operand with
“@.” Syntactically, an example of an indirect operand mode could be this form of the ADD
instruction:

ADD32 R1, @R2

For this instruction, the VM would take the 32-bit value at the address specified in R2, add it to the
contents of register R1, and store the result in register R1.

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