Intel Extensible Firmware Interface - Manual (Page 489)

Protocols — PCI Bus Support
Version 1.10 12/01/02 12-71
EFI_PCI_IO_PROTOCOL.Io.Read()
EFI_PCI_IO_PROTOCOL.Io.Write()
Summary
Enable a PCI driver to access PCI controller registers in the PCI I/O space.
Prototype
typedef
EFI_STATUS
(EFIAPI *EFI_PCI_IO_PROTOCOL_MEM) (
IN EFI_PCI_IO_PROTOCOL
*This,
IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
IN UINT8 BarIndex,
IN UINT64 Offset,
IN UINTN Count,
IN OUT VOID *Buffer
);
Parameters
This A pointer to the EFI_PCI_IO_PROTOCOL instance. Type
EFI_PCI_IO_PROTOCOL is defined in Section 12.4.
Width Signifies the width of the memory operations. Type
EFI_PCI_IO_PROTOCOL_WIDTH is defined in Section 12.4.
BarIndex The BAR index in the standard PCI Configuration header to use as
the base address for the I/O operation to perform. This allows all
drivers to use BAR relative addressing. The legal range for this
field is 0..5. However, the value
EFI_PCI_IO_PASS_THROUGH_BAR can be used to bypass the
BAR relative addressing and pass Offset to the PCI Root Bridge
I/O Protocol unchanged. Type
EFI_PCI_IO_PASS_THROUGH_BAR is defined in Section 12.4.
Offset The offset within the selected BAR to start the I/O operation.
Count The number of I/O operations to perform. Bytes moved is Width
size * Count , starting at Offset .
Buffer For read operations, the destination buffer to store the results. For
write operations, the source buffer to write data from.