Intel SDS2 User Manual
Page 17
Intel® Server Board SDS2
Architecture
Revision 1.2
Order Number: A85874-002
3
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64-bit, 66-MHz 3.3 V full-length PCI segment C (P64-C) with one embedded device
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Dual Channel Wide Ultra160 SCSI controller: Adaptec* AIC-7899W
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Two 64-bit 3.3 V Slots: PCI slots 5 and 6
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LPC (Low Pin Count) bus segment with two embedded devices
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Baseboard Management Controller (BMC) providing monitoring, alerting, and logging
of critical system information obtained from embedded sensors on the Server Board
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Super I/O controller chip providing all PC-compatible I/O (floppy, serial, keyboard,
mouse)
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X-Bus segment from CSB5 with one embedded device
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Flash ROM device for system BIOS: Fairchild* 29LV008B 8Mbit Flash ROM
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Two IDE connectors, supporting up to two ATA-100 compatible devices each. Note: Fab
4 board PBA A58285-402 and –403 supported only one IDE connector. Fab 5 PBA
A58285-502 (and later revisions) supports two IDE connectors.
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Four Universal Serial Bus (USB) ports: Three on the rear I/O and one on the Server
Board as a 10-pin header
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Two serial ports: One out to rear I/O and one through a 10-pin header on the Server
Board
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One floppy connector
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Four multi speed system fan connectors and two single speed CPU fan connectors.
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34-pin SSI compliant front panel connector