Intel SDS2 User Manual
Page 9
Intel® Server Board SDS2
Table of Contents
Revision 1.2
Order Number: A85874-002
ix
34.
Peer-to-peer PCI transactions are not supported between the CIOB-controlled 64-bit
PCI bus and the legacy 32-bit PCI bus controlled by the HE-SL north bridge .........................125
35.
SDS2 PCI slot current levels supported by the 5V rail...................................................125
36.
OB P100 NICs do not show at POST but attempt PXE boot and appear in Boot Menu125
Glossary...........................................................................................................................................I
Reference Documents.................................................................................................................III
Index.............................................................................................................................................. IV