Intel D15343-003 - Manual (Page 15)

Introduction
D15343-003 15
— Dithering
— Line and full-scene anti-aliasing
— 16- and 24-bit Z buffering
— 16- and 24-bit W buffering
— 8-bit Stencil buffering
— Double and triple render buffer support
— 16- and 32-bit color
— Destination alpha
— Vertex cache
— Optimal 3D resolution supported
— Fast Clear support
— ROP support
Hub Interface to ICH4-M
• 266-MB/s point-to-point Hub interface to ICH4-M
• 66-MHz base clock
Graphic Power Management
• Dynamic Frequency Switching
• Memory Self-Refresh during C3
• Intel Display Power Saving Technology
Power Management
• SMRAM space remapping to A0000h (128-kB)
• Supports extended SMRAM space above 256-MB, additional 1-MB TSEG from top of
memory, cacheable (cacheability controlled by CPU)
• APM Rev 1.2 compliant power management
• Supports Suspend to System Memory (S3), Suspend to Disk (S4) and Soft Off (S5)
• ACPI 1.0b, 2.0 support
• Optimized Clock Gating for 3D and Display Engines
• On-Die Thermal Sensor