Kamera Werk Dresden CMOS User Manual
Page 32
Version 1.08 (04/07)
Manual: CMOS Industrial Camera LOGLUX
i5
Page 32 of 46
KAMERA WERK DRESDEN GmbH
Initial profile value
Register
Addr.
Description
$x1
$x2
$x3
PROFILE_PIXELCLK
$102
Pixel clock rate
4
.
10
7
PROFILE_TRGSOURCE
$103
Trigger source
4 (free running trigger)
PROFILE_TRGDELAY
$104
Trigger delay
0 (0 ns)
PROFILE_TRGRATE
$108
Trigger rate
10 Hz
PROFILE_SMODE
$10A
Snapshot mode
0 (sequence mode)
PROFILE_TMMODE
$10C
Look-up table (LUT)
$0000 (no LUT)
PROFILE_SW0SOURCE
$10E
Source, switchport 0
0 (off)
PROFILE_SW0POL
$10F
Polarity, switchport 0
1 (high active)
PROFILE_SW0DELAY
$110
Delay, switchport 0
0 (0 ns)
PROFILE_SW0LEN
$114
Sig. time, switchport 0
1000 (1 us)
PROFILE_SW1SOURCE
$118
Source, switchport 0
0 (off)
PROFILE_SW1POL
$119
Polarity, switchport 0
1 (high active)
PROFILE_SW1DELAY
$11A
Delay, switchport 0
0 (0 ns)
PROFILE_SW1LEN
$11E
Sig.time, switchport 0
1000 (1 us)
PROFILE_XSTART
$130
ROI X start position
0
PROFILE_YSTART
$132
ROI Y start position
0
PROFILE_WIDTH
$134
ROI width
1278
PROFILE_HEIGHT
$136
ROI height
1023
PROFILE_INT0
$138
Integration time slope 1
0
0
3
.
10
7
PROFILE_INT1
$13C
Integration time slope 2
0
0
9
.
10
5
PROFILE_INT2
$140
Integration time slope 3
0
2
.
10
7
9
.
10
4
PROFILE_INT3
$144
Integration time l slope
23
.
10
6
3
.
10
6
41
.
10
2
PROFILE_SHUTTER
$148
Shutter principle
0 (synchronous shutter)
PROFILE_SUBSAMPL
$149
X/Y subsampling
0 (no subsampling)
PROFILE_AMPLIFIER
$14A
Amplification factor
0 (V=1.00)
PROFILE_CALIB
$14B
Calibration
0 = fast calibration
PROFILE_PRCHARGE
$14C
Precharge
0 = precharge line
PROFILE_DESCRPTN
$150
...
$16F
Profile description
Single Integration
Slope
Dual Integration Slope
Quadruple Integration
Slope
Table 5 : List of register initial values of function group 'camera configuration'
PROFILE_PIXELCLK
The register specifies the frequency of the pixel clock in Hz. The pixel clock
has an influence on a number of parameters, among them the image readout
rate, and may lead to undesired effects, e.g. the fading of the last pixel read
out, if unfavorably set.
Example:
w $102 #20000000
;Pixel clock rate is 20 MHz
PROFILE_TRGSOURCE
The register describes the trigger source and the type of triggering. A single
snapshot, snapshot sequence or continuous "snapshot" can be triggered by
an external trigger signal, by signal CC1 (camera control 1) applied to the
CameraLink
interface, or by setting bit 0 (corresponds to a register value of
1) in the PARAM_TRIGGER register. This releases a clock generator which
generates the trigger signals for the sensor at the desired frequency and in the
desired number. In the case of autonomous camera systems which are not
externally triggered, the camera can trigger itself during booting.
Example:
w $103 #3
;Trigger via TRegister
PROFILE_TRGDELAY
The register specifies a delay of the trigger event in nanoseconds. The actual
delay time is rounded to comply with the pixel clock accuracy (e.g.
TRGDELAY = 80
⇒
75.76ns delay at 66 MHz pixel clock rate ). There is also
a hardware-dependent delay in addition to the set delay time. Among others,
this hardware-dependent delay is determined by the camera-internal electrical
isolation of an optical coupling device (transmission time) or by the slope
(edge steepness) of the 24V trigger signal.
Example:
w $104 #1000
;delay is 1us