NXP Semiconductors PCA9665 - Manual (Page 29)

PCA9665_2 © NXP B.V. 2006. All rights reserved.
Product data sheet Rev. 02 — 7 December 2006 29 of 91
NXP Semiconductors
PCA9665
Fm+ parallel bus to I 2 C-bus controller
8.3.4 Slave Transmitter Byte mode
In the Slave Transmitter Byte mode, a number of data bytes are transmitted to a master
receiver one byte at a time (see
Figure 10 ). Data transfer is initialized as in the Slave
Receiver Byte mode. When I2CADR and I2CCON have been initialized, the PCA9665
waits until it is addressed by its own slave address followed by the data direction bit which
must be ‘1’ (R) for the PCA9665 to operate in the Slave Transmitter mode. After its own
slave address and the R bit have been received, the Serial Interrupt flag (SI) is set, the
Interrupt line (INT) goes LOW and I2CSTA is loaded with A8h. This status code is used to
vector to an interrupt service routine, and the appropriate action to be taken is detailed in
Table 32 .
The Slave Transmitter Byte mode may also be entered if arbitration is lost while the
PCA9665 is in the master mode. See state B0h and appropriate actions in
Table 32 .
If the AA bit is reset during a transfer, the PCA9665 will transmit the last byte of the
transfer and enter state C8h. The PCA9665 is switched to the not addressed slave mode
and will ignore the master receiver if it continues the transfer. Thus the master receiver
receives all ‘1’s as serial data. While AA is reset, the PCA9665 does not respond to its
own slave address. However, the I
2 C-bus is still monitored, and address recognition may
be resumed at any time by setting AA. This means that the AA bit may be used to
temporarily isolate SIO from the I
2 C-bus.
(1) See Table 31 .
(2) Defined state when a single byte is transmitted and an ACK is received.
(3) Defined state when a single byte is transmitted and a NACK is received.
(4) Defined state when a single byte is transmitted and the PCA9665 goes to the non-addressed mode (AA = 0) and an ACK is
received.
Fig 10. Format and states in the Slave Transmitter Byte mode (MODE = 0)
S SLA R A DATA A P or S
A8h B8h F8h
002aab027
reception of own
slave address and
transmission of one
or more data bytes
arbitration lost as MST and
addressed as slave
n
This number (contained in I2CSTA) corresponds
to a defined state of the I
2 C-bus. (1)
DATA A any number of data bytes and
their associated Acknowledge bits
from master to slave
from slave to master
DATA A
C0h
P or S
F8h
A
C8h
on STOP
on STOP
A
B0h
last data byte transmitted;
switched to Not Addressed slave
(AA bit in I2CCON = 0)
ALL '1's
(2) (3)
(4)