NXP Semiconductors PCA9665 - Manual (Page 39)

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PCA9665_2
© NXP B
.V
. 2006. All r
ights reser
v ed.
Pr
oduct data sheet
Re
v
. 02 — 7 December 2006
39 of 91
NXP Semiconductor
s
PCA9665
Fm+ parallel b
us to I
2 C-b
us contr
oller
50h BC[6:0] data bytes
have been received;
ACK has been
returned for all the
bytes Read data bytes
or 0 Total number of bytes
to be received 0 0 0 X 1 BC[6:0] data bytes will be received, ACK bit
will be returned for all of them
Read data bytes
or 1 Total number of bytes
to be received 0 0 0 X 1 BC[6:0] data bytes will be received, ACK bit
will be returned for all of them, except for the
last one where NACK bit will be returned
58h BC[6:0] data bytes
have been received;
ACK has been
returned for all the
bytes, except for the
last one where NACK
bit has been returned Read data bytes
or X X 1 0 0 X 1 Repeated START condition will be transmitted
Read data bytes
or X X 0 1 0 X 1 STOP condition will be transmitted;
STO flag will be reset.
Read data bytes X X 1 1 0 X 1 STOP condition followed by a START
condition will be transmitted;
STO flag will be reset.
Table 36. Master Receiver Buffered mode (MODE = 1) …continued
Status
code
(I2CSTA) Status of the
I
2 C-bus and the
PCA9665
Application software response Next action taken by the PCA9665
To/from I2CDAT To/from I2CCOUNT To I2CCON
LB BC[6:0] STA STO SI AA MODE