National Instruments PC-DIO-24/PnP - Manual (Page 7)

Contents
© National Instruments Corporation vii PC-DIO-24/PnP User Manual
Mode 1—Strobed Input.................................................................................. C-11
Mode 1 Input Programming Example.............................................. C-13
Mode 1—Strobed Output ............................................................................... C-14
Mode 1 Output Programming Example ........................................... C-16
Mode 2—Bidirectional Bus............................................................................ C-17
Mode 2 Programming Example ....................................................... C-19
Interrupt Programming Examples for the 82C55A ........................................ C-20
Interrupt Handling......................................................................................................... C-22
Appendix D
Register-Level Programming
Differences between the PC-DIO-24PnP and the PC-DIO-24 ..................................... D-1
Configuration ................................................................................................................ D- 2
Base I/O Address Settings .............................................................................. D-3
Interrupt Selection .......................................................................................... D-5
Interrupt Enable Settings.................................................................. D-6
Interrupt Level Settings.................................................................... D-6
Installation .................................................................................................................... D-7
Appendix E
Customer Communication
Glossary
Index
Figures
Figure 1-1. The Relationship between the Programming Environment,
NI-DAQ, and Your Hardware ............................................................... 1-4
Figure 2-1. Jumper W1 Location.............................................................................. 2-1
Figure 3-1. Digital I/O Connector Pin Assignments ................................................ 3-2
Figure 3-2. Digital I/O Connections ......................................................................... 3-6
Figure 3-3. DIO Channel Configured for High DIO Power-up State
with External Load................................................................................. 3-8
Figure 3-4. DIO Channel Configured for Low DIO Power-up State
with External Load................................................................................. 3-9
Figure 3-5. Mode 1 Timing Specification for Input Transfers ................................. 3-12
Figure 3-6. Mode 1 Timing Specification for Output Transfers .............................. 3-13