NEC uPD78056Y - Manual (Page 111)

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CHAPTER 5 CPU ARCHITECTURE
Figure 5-19. Stack Pointer Configuration
The SP is decremented ahead of write (save) to the stack memory and is incremented after read (reset) from
the stack memory.
Each stack operation saves/resets data as shown in Figures 5-20 and 5-21.
Caution Since RESET input makes SP contents indeterminate, be sure to initialize the SP before
instruction execution.
Figure 5-20. Data to be Saved to Stack Memory
Figure 5-21. Data to be Reset from Stack Memory
15
PC15 PC14 PC13 PC12 PC11 PC10 PC9 PC8 PC7 PC6 PC5 PC4 PC3 PC2 PC1
0
PC0 SP
Interrupt and
BRK Instruction
PSW
PC15-PC8
PC15-PC8
PC7-PC0 Register Pair Lower
SP SP _ 2
SP _ 2
Register Pair Upper
CALL, CALLF, and
CALLT Instruction PUSH rp Instruction
SP _ 1
SP
SP SP _ 2
SP _ 2
SP _ 1
SP
PC7-PC0 SP _ 3
SP _ 2
SP _ 1
SP
SP SP _ 3
RETI and RETB
Instruction
PSW
PC15-PC8 PC15-PC8
PC7-PC0 Register Pair Lower
SP SP + 2
SP
Register Pair Upper
RET Instruction POP rp Instruction
SP + 1
PC7-PC0
SP SP + 2
SP
SP + 1
SP + 2
SP
SP + 1
SP SP + 3