NEC uPD78056Y User Manual

Page 235

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235

CHAPTER 9 8-BIT TIMER/EVENT COUNTERS 1 AND 2

Table 9-9. Interval Times when 2-Channel 8-Bit Timer/Event Counters (TM1 and TM2)

are Used as 16-Bit Timer/Event Counter

Minimum Interval Time

Maximum Interval Time

Resolution

MCS = 1

MCS = 0

MCS = 1

MCS = 0

MCS = 1

MCS = 0

0

0

0

0

TI1 input cycle

2

8

×

TI1 input cycle

TI1 input edge cycle

0

0

0

1

TI1 input cycle

2

8

×

TI1 input cycle

TI1 input edge cycle

2

×

1/f

X

2

2

×

1/f

X

2

17

×

1/f

X

2

18

×

1/f

X

2

×

1/f

X

2

2

×

1/f

X

(400 ns)

(800 ns)

(26.2 ms)

(52.4 ms)

(400 ns)

(800 ns)

2

2

×

1/f

X

2

3

×

1/f

X

2

18

×

1/f

X

2

19

×

1/f

X

2

2

×

1/f

X

2

3

×

1/f

X

(800 ns)

(1.6

µ

s)

(52.4 ms)

(104.9 ms)

(800 ns)

(1.6

µ

s)

2

3

×

1/f

X

2

4

×

1/f

X

2

19

×

1/f

X

2

20

×

1/f

X

2

3

×

1/f

X

2

4

×

1/f

X

(1.6

µ

s)

(3.2

µ

s)

(104.9 ms)

(209.7 ms)

(1.6

µ

s)

(3.2

µ

s)

2

4

×

1/f

X

2

5

×

1/f

X

2

20

×

1/f

X

2

21

×

1/f

X

2

4

×

1/f

X

2

5

×

1/f

X

(3.2

µ

s)

(6.4

µ

s)

(209.7 ms)

(419.4 ms)

(3.2

µ

s)

(6.4

µ

s)

2

5

×

1/f

X

2

6

×

1/f

X

2

21

×

1/f

X

2

22

×

1/f

X

2

5

×

1/f

X

2

6

×

1/f

X

(6.4

µ

s)

(12.8

µ

s)

(419.4 ms)

(838.9 ms)

(6.4

µ

s)

(12.8

µ

s)

2

6

×

1/f

X

2

7

×

1/f

X

2

22

×

1/f

X

2

23

×

1/f

X

2

6

×

1/f

X

2

7

×

1/f

X

(12.8

µ

s)

(25.6

µ

s)

(838.9 ms)

(1.7 s)

(12.8

µ

s)

(25.6

µ

s)

2

7

×

1/f

X

2

8

×

1/f

X

2

23

×

1/f

X

2

24

×

1/f

X

2

7

×

1/f

X

2

8

×

1/f

X

(25.6

µ

s)

(51.2

µ

s)

(1.7 s)

(3.4 s)

(25.6

µ

s)

(51.2

µ

s)

2

8

×

1/f

X

2

9

×

1/f

X

2

24

×

1/f

X

2

25

×

1/f

X

2

8

×

1/f

X

2

9

×

1/f

X

(51.2

µ

s)

(102.4

µ

s)

(3.4 s)

(6.7 s)

(51.2

µ

s)

(102.4

µ

s)

2

9

×

1/f

X

2

10

×

1/f

X

2

25

×

1/f

X

2

26

×

1/f

X

2

9

×

1/f

X

2

10

×

1/f

X

(102.4

µ

s)

(204.8

µ

s)

(6.7 s)

(13.4 s)

(102.4

µ

s)

(204.8

µ

s)

2

11

×

1/f

X

2

12

×

1/f

X

2

27

×

1/f

X

2

28

×

1/f

X

2

11

×

1/f

X

2

12

×

1/f

X

(409.6

µ

s)

(819.2

µ

s)

(26.8 s)

(53.7 s)

(409.6

µ

s)

(819.2

µ

s)

Other than above

Setting prohibited

Remarks 1. f

X

: Main system clock oscillation frequency

2. MCS

: Oscillation mode selection register (OSMS) bit 0

3. TCL10 to TCL13 : Bits 0 to 3 of timer clock select register (TCL1)

4. Values in parentheses when operated at f

X

= 5.0 MHz.

0

1

1

0

0

1

1

1

1

0

0

0

1

0

0

1

1

0

1

0

1

0

1

1

1

1

0

0

1

1

0

1

1

1

1

0

1

1

1

1

TCL13 TCL12 TCL11 TCL10

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