NEC uPD78056Y - Manual (Page 128)

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CHAPTER 5 CPU ARCHITECTURE
5.4.8 Based indexed addressing
[Function]
This addressing addresses the memory by adding the contents of the HL register, which is used as a base register,
to the contents of the B or C register specified in the instruction word, and by using the result of the addition.
The HL, B, and C registers to be accessed are registers in the register bank specified by the register bank select
flags (RBS0 and RBS1). The addition is performed by extending the contents of the B or C register to 16 bits
as a positive number. A carry from the 16th bit is ignored. This addressing can be carried out for all the memory
spaces.
[Operand format]
Identifier Description
— [HL + B], [HL + C]
[Description example]
In the case of MOV A, [HL + B]
Operation code 1 0 1 0 1 0 1 1
5.4.9 Stack addressing
[Function]
The stack area is indirectly addressed with the stack pointer (SP) contents.
This addressing method is automatically employed when the PUSH, POP, subroutine call and RETURN
instructions are executed or the register is saved/reset upon generation of an interrupt request.
Stack addressing enables to address the internal high-speed RAM area only.
[Description example]
In the case of PUSH DE
Operation code 1 0 1 1 0 1 0 1