NEC uPD78056Y User Manual
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441
CHAPTER 19 SERIAL INTERFACE CHANNEL 2
Figure 19-1. Serial Interface Channel 2 Block Diagram
Note
See Figure 19-2 for the baud rate generator configuration.
Internal Bus
Asynchronous
Serial Interface
Mode Register
Asynchronous
Serial Interface
Status Register
Receive Buffer
Register
(RXB/SIO2)
Direction
Control Circuit
Receive Shift
Register (RXS)
Reception
Control
Circuit
RxD/SI2/
P70
TxD/SO2/
P71
INTSR/INTCSI2
CSIE2
CSIM
22
CSCK
INTSER
SCK Output
Control Circuit
Baud Rate Generator
f
xx
-f
xx
/2
10
Internal Bus
SCK
INTST
Baud Rate Generator
Control Register
Note
Serial Operating
Mode Register 2
PE
FE
OVE
Transmission
Control
Circuit
PM71
ISRM
ASCK/
SCK2/P72
PM72
Direction
Control Circuit
Transmit Shift
Register
(TXS/SIO2)
RXE PS1 PS0 CL
SL ISRM
TXE
SCK
4
4
CSIE2
TXE
RXE
MDL3 MDL2 MDL1 MDL0 TPS3 TPS2 TPS1 TPS0