Xilinx LogiCore PLB PCI Full Bridge - Manual (Page 20)

PLB PCI Full Bridge (v1.00a)
20 www.xilinx.com DS508 March 21, 2006
Product Specification
EARL
Y ACCESS
G26 C_PCIBAR_NUM G27-G32
The set of PCI/v3.0 BAR-parameters of
N = 0 to C_PCIBAR_NUM-1 are
meaningful and the parameters of N =
C_PCIBAR_NUM up to and including 2
have no effect. If C_PCIBAR_NUM = 3,
the set of PCI/v3.0 BAR-parameters of N
= 0 to 2 are all meaningful (i.e., G27-G32
are meaningful)
G27 C_PCIBAR2IPIFBAR_0 G28
Only the high-order bits above the length
defined by G28 are meaningful
G28 C_PCIBAR_LEN_0
G29 C_PCIBAR2IPIFBAR_1 G30
Only the high-order bits above the length
defined by G30 are meaningful. Not
meaningful if G26=1
G30 C_PCIBAR_LEN_1 Not meaningful if G26=1
G31 C_PCIBAR2IPIFBAR_2 G32
Only the high-order bits above the length
defined by G30 are meaningful. Not
meaningful if G26=1-2
G32 C_PCIBAR_LEN_2 Not meaningful if G26=1-2
G33 C_PCI_ABUS_WIDTH Only 1 setting
G34 C_PCI_DBUS_WIDTH Only 1 setting
G35
C_PCI2IPIF_FIFO_ABUS_
WIDTH
G36
C_IPIF2PCI_FIFO_ABUS_
WIDTH
G37
C_INCLUDE_INTR_A_
BUF
P63
If G37 = 0, an io-buffer for P63 is not
explicitly instantiated
G38 C_INCLUDE_REQ_N_BUF P66
If G38 = 0, an io-buffer for P66 is not
explicitly instantiated
G39
C_TRIG_PCI_READ_OCC
_LEVEL
G35
Must be set to 5 to the lesser of 24 or the
PCI2IPIF FIFO DEPTH-1 where the
PCI2IPIF FIFO-1 depth is given by
2^G35
G40
C_TRIG_IPIF_
WRBURST_OCC_LEVEL
G35
Must be set to 2 to the lesser of 24 or the
PCI2IPIF FIFO DEPTH-1 where the
PCI2IPIF FIFO-1 depth is given by
2^G35
G41
C_TRIG_PCI_DATA_XFER
_OCC_LEVEL
G36
Must be set to 2 to the lesser of 24 or the
IPIF2PCI FIFO DEPTH-3 where
IPIF2PCI FIFO DEPTH given by 2^G36
G42
C_TRIG_IPIF_READ_OCC
_LEVEL
G36
Must be set to 1 to the lesser of 24 or the
IPIF2PCI FIFO DEPTH-1 where
IPIF2PCI FIFO DEPTH given by 2^G36
Table 3: PLB PCI Bridge Parameters-Port Dependencies (Contd)
Generic Parameter Affects Depends Description