Xilinx LogiCore PLB PCI Full Bridge - Manual (Page 30)

PLB PCI Full Bridge (v1.00a)
30 www.xilinx.com DS508 March 21, 2006
Product Specification
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The example below shows how the IPIFBAR2PCIBAR_N registers assignments define translation of
PLB addresses within the range of a given IPIFBAR to PCI address space.
Setting C_INCLUDE_BAROFFSET_REG=1 includes high-order bit registers for all IPIFBARs defined
by C_IPIFBAR_NUM.
In this example where C_IPIFBAR_NUM=4, the following assignments for each range are made.
C_IPIFBAR_0=0x12340000
C_IPIF_HIGHADDR_0=0x1234FFFF
C_IPIFBAR2PCIBAR_0=Don’t care
C_IPIF_SPACETYPE_0=1
C_IPIFBAR_1=0xABCDE000
C_IPIF_HIGHADDR_1=0xABCDFFFF
C_IPIFBAR2PCIBAR_1=Don’t care
C_IPIF_SPACETYPE_1=0
C_IPIFBAR_2=0xFE000000
C_IPIF_HIGHADDR_2=0xFFFFFFFF
C_IPIFBAR2PCIBAR_2=Don’t care
C_IPIF_SPACETYPE_2=1
C_IPIFBAR_3=0x00000000
C_IPIF_HIGHADDR_3=0x0000007F
C_IPIFBAR2PCIBAR_3=Don’t care
C_IPIF_SPACETYPE_3=1
Associated with each IPIF BAR for C_IPIFBAR_N for N=0 to 3 are four registers for the high-order bits
to be substituted when making the translation to PCI memory and /IO space. For the previous
example, the following registers are set.
Register for C_IPIFBAR_0 (IPIFBAR2PCIBAR_0 High-Order Bit Register):
Programmable register for 16 high-order bits. The data in the register is substituted for the 16 msb of
the address that is translated to PCI bus.
Register for C_IPIFBAR_1 (IPIFBAR2PCIBAR_1 High-Order Bit Register):
Programmable register for 19 high-order bits. The data in the register is substituted for the 19 msb of
the address that is translated to PCI bus.
Register for C_IPIFBAR_2 (IPIFBAR2PCIBAR_2 High-Order Bit Register):
Programmable register for 7 high-order bits. The data in the register is substituted for the 7 msb of the
address that is translated to PCI bus.
Register for C_IPIFBAR_3 (IPIFBAR2PCIBAR_3 High-Order Bit Register):
Programmable register for 25 high-order bits. The data in the register is substituted for the 25 msb of
the address that is translated to PCI bus.
The remaining low-order bits are set to zero when a read of these registers is performed.
Writing 0x56710000 to IPIFBAR2PCIBAR_0 High-Order Bit Register and then accessing the PLB PCI
bridge IPIFBAR_0 with address 0x12340ABC on the PLB bus would yield 0x56710ABC on the PCI bus.