4 chipset, Northbridge configuration, Asus kfn5-d sli 4-21 – Asus KFN5-D SLI User Manual
Page 87
ASUS KFN5-D SLI
4-21
4.4.4 Chipset
The Chipset menu allows you to change the advanced chipset settings.
Select an item then press <Enter> to display the sub-menu.
NorthBridge Configuration
The NorthBridge Configuration menu allows you to change the Northbridge
settings.
Select Screen
Select Item
+- Change Option
F1 General Help
F10 Save and Exit
ESC Exit
NorthBridge Chipset Configuration
Memory Configuration
ECC Configuration
Power Down Control
[Auto]
Alternate VID
[0.850 V]
Memory Timing Parameters [CPU Node 0]
Memory CLK
: 200 MHz
CAS Latency (Tcl)
: 3.0
RAS/CAS Delay (Trcd)
: 3 CLK
Min Active RAS (Tras)
: 8 CLK
Row Precharge Time (Trp) : 3 CLK
RAS/RAS Delay (Trrd)
: 2 CLK
Row Cycle (Trc)
: 13 CLK
Asynchronous Latency
: 5 ns
NorthBridge Configuration
SouthBridge/MCP55 Configuration
Hyper Transport Configuration
Options for NB.
Advanced Chipset Settings
WARNING: Setting wrong values in below sections
may cause system to malfunction.
Memory Configuration
The memory configuration menu allows you to change the memory
settings.
Select Screen
Select Item
+- Change Option
F1 General Help
F10 Save and Exit
ESC Exit
Memory Configuration
Memclock Mode
[Auto]
MCT Timing Mode
[Auto]
Bank Interleaving
[Auto]
Enable Clock to All DIMMS
[Disabled]
DQS Signal Training Control [Enabled]
MemClk Tristate C3/ATLVID
[Disabled]
CS Sparing Enable
[Disabled]
Memory Hole Remapping
[Enabled]
MEMCLK can be set
by the code using
AUTO, or if you use
LIMIT, you can set
one of the standard
values.